Horace Hub

Horace Hub

The Horace project in one place. Horace He found that a matmul runs faster on predictable data; this project follows that result on the ET-SoC-1 from the speed down to transistors, electrons and atoms, for an interactive post you zoom through. Say "refresh the Horace hub" to update it.

What's been done, by week

Newest week first; inside a week, oldest first. A week with nothing in it gets no heading. (public): anyone with the link. (private): only you. Tailnet links work on your devices.

Week 43 · 19–25 Oct 2026

  • Mon 19 Oct, 18:17 · Talk Sutro #36 (private; tailnet): you told Horace He's result as transistor flips. Gavin Crooks gave five minutes on the energy floor. You cited about ten repeaters per mm in the archive's TSMC files, and the room, most likely Mitchell Nahmias, explained repeaters and inverters.
  • Tue 20 Oct, 14:56 · Fix The bit-flip plan is private again (private: Eric Frank's messages and NDA-flagged facts). It had gone public at 13:0x with the thermal camera hub's pages; nobody had opened it.
  • Tue 20 Oct, 15:11 · Plan From the speed down to the atoms: what's missing (private; tailnet): the post as ten stops on the chip diagram's zoom, what each stop has and lacks, one switch in slow motion and nine reasons some switches cost more, eight tracks, the mordast list, and this week's six moves.
  • Tue 20 Oct, 15:20 · Hub This hub, on your ask: every page of the project in one place, with this Log grouped by week.
  • Tue 20 Oct, 19:28 · Query — "Antigravity: deterministic transistor flipping count" Deterministic transistor-flip experiments on 1,024 RISC-V cores (public; tailnet): instead of starting with a 7-stage TensorFMA32 where 1 input bit flip triggers an avalanche of ~1,050 toggles across a Wallace tree, use the 1,024 programmable 64-bit RISC-V Minion cores (fnot.pi, fxor.pi, fand.pi, for.pi, fadd.pi) as a 1-gate-deep deterministic toggle synthesizer (E-D1–E-D7, with three interactive explorers). In existing 3-card E46 data (manual.json), comparing fxor.pi (+7.35 pJ, 128 output flips/op) against fand.pi/for.pi (+5.93 pJ, 96 output flips/op) on the same random source registers already separates output-path + VRF-write energy (33.7 fJ die = 407,000 electrons/bit) from input-bus + gate-input energy (5.0 fJ die = 60,000 electrons/bit), while fadd.pi (zeros = 12.68 pJ, const = 12.73 pJ) proves the integer adder has no zero-gate.
  • Tue 20 Oct, 20:41 · Research The Hamming ladder, every page read (private): on your ask, 50 agents read the 210 pages linked from this hub and the AI Foundry hub, the lab repo, the three boxes, 157 session logs and the literature. The ladder had never run, in any form. Two corrections: a cycle of 16 four-bit codes flips at most 3.5 bits a step (the 12 Oct plan said ~3.75), and the 19:28 entry's E46 prices (5.0 fJ in, 33.7 fJ out) and its "fmadd.ps +8.94 pJ" do not hold up against the raw data (map §3).
  • Tue 20 Oct, 20:22–21:01 · Lab What one flipped bit costs on the ET-SoC-1 (public): the Hamming ladder, pre-registered and run on three cards (E60, code and data). One flipped input bit of an fp32 multiply-add costs 117 fJ of board energy with A = 1.0 and 130 fJ with A = pi, the cascade included; a bit on a register-file read port 20.8 fJ and a result bit 31.2 fJ, through one XOR. The same 4,096 multiply-adds cost +0.68 W more in max-flip order than in Gray order (aifoundry3, 600 MHz). Across 0.52, 0.60 and 0.62 V the price follows V², not the clock. Your summary (private).
  • Tue 20 Oct, 22:5x · Analysis A bit flip in microns: Dally's 10 µm, measured on the ET-SoC-1 (anyone with the link; tailnet): on your ask, E60's flips set against the heat-per-mm mesh (finding 20: a flipping bit costs 163 fJ a hop on the mesh rail, 43.7 fJ per mm). Dally's rule, read per flipped bit, is 10 µm. Here a flipped bit is worth about 5 µm of mesh travel as one gate's toggle (Dally's scale), 0.3 mm as an operand bit delivered into a logic gate and 1.8 mm as an input bit of an fp32 multiply-add. A whole 32-bit add lane is worth about 0.6 mm of carrying its operands, against Dally's 10 µm. The bit's trip from the register file to the gate is what costs.
  • Wed 21 Oct, 00:49–02:13 · Lab Verifying the deterministic transistor-flip experiments (public): on your ask, the 19:28 page's seven experiments pre-registered as E61 and run on three cards (code and data); the 19:28 page now opens with a note linking it. Its prices and its zero gate do not hold: a result bit costs 27–30 fJ, not 44; a carry position about 1 fJ, not 14; fmadd.ps has no zero gate (0.2 pJ, not 8.9). Its sum of an input and an output bit does (50.7 fJ against 50.9). Changing which register is read costs 369–452 fJ per index bit, 12–14 times its estimate. The vector unit retires one op per cycle; the harness's 0.58 or 0.61 is set by where its loop sits (the loop head's address mod 32). The camera saw a +373 mK left/right swap when the loud half of the shires moved. Of 15 registered rows: 1 confirmed, 1 ours confirmed, 4 refuted, 5 open, 3 under-resolved, 1 not scored.
  • Wed 21 Oct, 17:06–18:17 · Lab Heat movies: where the work runs, seen from outside (public): on your ask for videos of heat spreading by how the compute is scheduled, eight movies from the thermal camera behind aifoundry2's card, with the camera's live stream beside them. Pre-registered as E62 (frozen 16:58), 390 launches over 71.1 min of card time, 0 failed (code and pre-registration, data). The camera sees the die turned about −88°, not mirrored. Heat walks the die's four corners clockwise on screen (5.6 sd over its own permutation null, p = 0.0005); moving 192 harts west→east at constant total power moves the warm half of the board by +525 ± 22 mK, north→south +511 ± 7 mK with the pattern turned 94°; a 4×2 block slides one column at a time and the heat follows, monotone. Both nulls are flat: the same mask +4 ± 11 mK, a 180° rotation −8 ± 9 mK (post hoc). All 32 shires on warms the whole frame +7.1 K in 42 s, half of it in 14.8 s. Power is 5.80 W + 55.8 mW per hart, not 40.6 mW per hart from zero, which is what the calibration ladder re-priced the later blocks against. Session log.
  • Thu 22 Oct 2026, 05:15 · Research Power, not heat: what limits a GPU under sustained matmul (public; tailnet), on your Wed 21 Oct 14:58 ask to check whether GPUs are heat-limited: on air and on liquid, a sustained matmul holds them at their power cap, and the cooling sets the cap (the same AMD die gets 1,000 W on air and 1,400 W on liquid); heat binds only when cooling falls short.
  • Thu 22 Oct, 08:0x · Vault Horace's missing bit-flip heat (private: Esperanto NDA, foundry-derived numbers; tailnet, the original on mordast; session log): on your Wed 21 Oct 11:49 ask, the transistor, gate and wire facts this post was missing, checked against what Esperanto actually built and measured. It walks the heat chain stop by stop, lists the corrections the lab model and these pages need, says which statements could ever be public, and ends with four questions for Roman. Its numbers stay there: most are foundry-derived and can never be public.
  • Thu 22 Oct, 23:4x · Fix The report's spacesheep copy is private, and linked here on your ask. You moved it from Chrome at 23:43 and it took your default, anyone with the link; it was made private minutes later, with one view, most likely yours. Pages made from mordast work stay private and unshared (request-aifoundry.md), and the session that wrote the report made no copy, because its foundry values are not to leave mordast.

Week 42 · 12–18 Oct 2026

  • Mon 12 Oct, 04:45 · Plan Weighing a bit flip: the follow-up plan (private: Eric Frank's messages and NDA-flagged facts; tailnet), from your Sunday 17:25 note. It covers the Hamming ladder, the same arithmetic in Gray and max-flip order, three clocks and the camera: about 5 card-hours on aifoundry3 card 0. Not run yet.
  • Wed 14 Oct, 04:40 · List What to get out of mordast (tailnet; private, NDA): Eric Frank's and Mitchell Nahmias's asks. Mitchell's list of file types (netlists, .lib, .spef, .saif, power reports) is the list this project's bottom stops need.
  • Thu 15 Oct, 10:32 · Note Your voice note made it an AI Foundry project: a follow-up post that finds why random data costs more, down to individual electrons.
  • Fri 16 Oct, 08:15 · Lunch Eyvind Niklasson, and the way to Alexander Mordvintsev (tailnet; private), from Thursday's lunch. Their group plans Distill-style interactive articles. Alex wrote a gate-level simulator that rebuilds a circuit from its layout, and he evolves circuits at the transistor level.
  • Fri 16 Oct, 08:20 · Outline The Horace He follow-up, counted down to the electron (tailnet; private: it quotes your voice note): random data costs 48 million more electrons per multiply-add than zeros, and physics reproduces 38 → 63 W to within a factor of three. The open question is why a clocked bit costs 1.5–3.3 times a textbook flip-flop. Its numbers script.

Week 41 · 5–11 Oct 2026

  • Wed 7 Oct, 17:00 · Page Dally's heuristics, rebuilt with calculators (public; tailnet): every energy and time figure in Dally's 2022 essay from six physical constants. Wire is 0.2 fF per µm; repeaters every ~50 µm.
  • Wed 7 Oct, 19:45 · Lab Heat spreading (public; tailnet): the per-sensor firmware's first runs. Blocks of four or more shires show; one shire doesn't move its own sensor in 8 s.
  • Thu 8 Oct · Lab How energy is measured (public; record, private). aifoundry3 card 0 measured 0.40–0.44, 2.16–2.17 and 5.61–5.89 pJ per multiply-add on zeros, ones and random data. The board's reading refreshes about every 0.16 s.
  • Fri 9 Oct, 12:16 · Lab The camera's first look at a card's back (public hub): the die's footprint through the board, in one frame.
  • Sun 11 Oct, 14:06 · Vault Thermal files search (private; tailnet): every thermal and layout file in the archive, and no full-chip layout.
  • Sun 11 Oct, 17:25 · Note Your note: measure the heat of individual transistors flipping, test the theory, and use the thermal camera.
  • Sun 11 Oct, evening · Vault Shire clocks and voltage (private, NDA; tailnet): what the silicon can do per shire, and what the firmware exposes.

Week 40 · 28 Sep – 4 Oct 2026

Week 39 · 21–27 Sep 2026

  • Mon 21 Sep, 08:11 · Lab The Horace experiment, third version (public, listed): every run launched at 80 °C; 38.29 / 46.73 / 63.40 W at one 9.18 TFLOPS; the RTL flip model. By 13:08 it had predicted 14 structured matrices before they ran.
  • Mon 21 Sep, 15:17 · Lab Why the ET-SoC-1 is low power (public): Esperanto's equation measured term by term against an A100. The card runs at 0.52 V and 600 MHz, against a GPU's ~0.85 V.
  • Tue 22 Sep, 04:16 · Pitch A compiler that knows where the fan is (public; tailnet): the prior art the post credits first, ALUPower (2016) and Gregersen, Patel and Choukse (2024).
  • Tue 22 Sep, 11:26 · Brief David Kanter on power (private; tailnet), from your Sunday conversation: provisioned against measured power, DVFS, leakage and thermal placement.
  • Tue 22 Sep, 11:53 · Lab The DVFS loop and its leakage (public): the governor measures power instead of estimating it, and never switches leakage off.
  • Wed 23 Sep, 08:18 · Lab The energy manual (public): energy at rest, awake, per instruction, per byte and between shires.
  • Thu 24 Sep, 16:18 · Lab Heat per millimetre (public): a random bit moved a millimetre costs 37 fJ on the mesh rail, against Dally's ~100. This is the 1 mm heat analysis.
  • Sat 26 Sep · Lab Three cards: the steps between patterns hold on all three, each card's scale within 0.88–0.99 of the others (Horace §10). The same day: Pointing a thermal camera at the ET-SoC-1 (public), 20 experiments.
  • Sun 27 Sep, 13:39 · Lab The ET-SoC-1, interactively (public): the chip diagram's first version, with data flows played stage by stage, among them the same matmul's watts and heat on different data.

Week 38 · 14–20 Sep 2026

  • Sun 20 Sep, 12:55 · Lab Limits of observability (public), on your ask Q6: what can be seen, from the board's meter down to one flip-flop, and whether single bit flips can be tracked.
  • Sun 20 Sep, 21:25 · Lab The Horace experiment, first version (public), on your ask Q9: find Horace He's post and reproduce it on the ET-SoC-1. At 21:46 it was rerun with every run started at 80 °C.

Week 37 · 7–13 Sep 2026

  • Tue 8 Sep · Research The Memory Wall (tailnet; private) and Justifying Dally's heuristics (tailnet; public since 7 Oct). Why arithmetic became almost free and moving a bit did not; charge, capacitance, repeaters and the square-root rules from first principles. The ground floor of stops 6 and 9.

Where it stands

Thu 22 Oct 2026 (week 43), 23:5x PDT.

  • Stage: the ladder has run (E60, Tue 20 Oct, three cards), so the post's middle is measured: a flipped input bit of an fp32 multiply-add costs 117 fJ on the board, a read-port bit 20.8 fJ, a result bit 31.2 fJ, and the same arithmetic in another order +0.68 W. The agent-proposed one-gate experiments have run too (E61, Wed 21 Oct): the gate itself is a few fJ of a bit's ~26 fJ, a carry position ~1 fJ, a register-file cell ~0.8 fJ, while changing which register is read costs ~0.4 pJ per index bit. The camera now has the spatial half of the coda (E62, Wed 21 Oct, eight movies): at constant total power it shows where the work runs on the die — the warm half follows 192 harts west→east or north→south, heat walks the four corners clockwise, a 4×2 block slides column by column, and two nulls stay flat. The other half, the camera's view of a single Hamming rung against its zero (lock-in), is still not done, and nothing on the camera is in millimetres yet: it wants a rigid mount and a fiducial or a measured lens distance. Still missing: that lock-in, a second card at 600 MHz, and the bottom third (gates, wires, transistors) from open tools. The archive has checked that bottom third in private (the vault report, Thu 22 Oct; NDA): what it found stays there, and the post takes a number from it only once Roman clears it.
  • Next, yours: 1. the camera's lock-in of a top rung against its zero on aifoundry2 (the 26 Sep plan's E-T10, with tonight's rungs); 2. start the open-netlist and SPICE sessions (prompts at the end of the plan); 3. done Thu 22 Oct: the mordast spelunk, on your own ask rather than the §5 prompt, is Horace's missing bit-flip heat (private, NDA). Its What to change table is the list of corrections; even the ones it calls public-safe go past Roman first; 4. Fri 23 Oct at Studio 45, ask Roman about pinned clocks (now for a 600 MHz replicate on a second card), the camera mount, a card to decap, and whether a synthesised netlist exists; and tell him the cards now level off at 60–64 °C under the old heater protocol. Bring the vault report's four questions for Roman too (the end of its Still missing section), among them which of its results may go in the post.
  • Waits on: you (the camera session); Roman (four OKs, and the vault report's four questions); Eric Frank (his heater code and readings, asked for in the 12 Oct plan).
  • Run: E62 in the lab repo (tools/claims-v3/hm; pre-registration frozen 16:58 PDT, amendment A1 re-priced the later blocks after the calibration ladder measured ~2.5× the designed power per hart). The camera's automatic shutter fired every 8–10 s near the warm card, with per-pixel steps up to 10 K; the cleaning is post hoc and labelled as such. E61 in the lab repo (7eb1ec79; pre-registered d0d68abb, amendments A1 and A2 before the data they touched). E60 in the lab repo (27ab9cfa); the predictions were frozen before the first pass, three amendments before the data they touched. The RTL model got the shape and over-predicted the size (0.83 of predicted, 1.28 W rms over 26 items): inside its pre-registered 1.5 W mark.
  • Small fixes owed:
  • The Horace experiment's dashboard card still says "zeros 38 W, constants 48 W, random 67 W", from its first version. The page itself says 38.29 / 46.73 / 63.40 W. A lab-door fix at its next deploy.
  • The electrons' direction. The 16 Oct outline says electrons fall from the 0.517 V rail to ground. Charge does; electrons go from ground to the rail. The chip diagram's FinFET text mixes the two as well (its 14 Oct audit, T13).
  • ~~The 19:28 page~~ done Wed 21 Oct: it now opens with a note linking the verification and saying which of its numbers hold.
  • The AI Foundry hub's registry row for these sessions: that file holds another session's uncommitted edits today.

From the speed down to the atoms

The post's ten stops, each with what it has and what it lacks. The detail, with sources, is in the plan §2.

The archive's private check of the same stops is Horace's missing bit-flip heat (Thu 22 Oct; private: NDA). Nothing from it is in this table: a number moves here only once Roman clears it.

Stop State Have Missing
0 · Speed partly A100: 295 against 257 TFLOPS (Horace); ET-SoC-1 on a cool die: 11.4–11.8 against 9.3 a GPU run that logs clocks and watts
1 · The governor partly the DVFS loop measures power; 600 / 700 / 800 MHz at 0.517 / 0.568 / 0.618 V; below 65 °C a busy governor-free card runs 800 MHz (E60) one line from a power cap to the clock, checked on both chips
2 · The card measured, roughly board +25.1 W → minion rail +18.3 W (0.727, late in the run) the rail at the launch temperature; the regulators
3 · The die partly sensors, heat spreading, 37 fJ per bit-mm on the mesh block-by-block power; a die photo; die thickness
4 · The vector lane measured zero gating; 602.5 bits clocked per multiply-add; a bit on a read port 20.8 fJ into an XOR and 28 fJ into an AND, a result bit 31.2 fJ (E60); the unit retires one op per cycle, the harness 0.58 or 0.61 by where its loop sits; reading a different register costs ~0.4 pJ per index bit (E61) what the register file's own cells cost (tonight's sources never change)
5 · The multiply-add measured one flipped input bit 117 fJ (A = 1.0) and 130 fJ (A = pi) all-in, the first flip +0.59 / +1.95 W extra; the same arithmetic +0.68 W dearer in max-flip order (E60); 21,331 counted toggles; the vector fmadd.ps has no zero gate (E61) glitches; RTL names per wire; a second card at 600 MHz
6 · The gate and wire modelled ASAP7's gate capacitances; 0.2 fF per µm of wire; repeaters; an AND costs 35% more per flipped input bit than an XOR, and both are mostly the bit's transport, not the gate (E60); in travel, a gate's own toggle is worth about 5 µm of the mesh (Dally's 10 µm), an operand bit delivered to a gate 0.3 mm, a multiply-add input bit 1.8 mm (in microns); OR, ADD and XOR within 2.7 fJ per bit of each other, a carry position ~1 fJ, a register-file cell ~0.8 fJ (E61) the real unit's wires (an open netlist)
7 · The transistor missing the chip diagram's FinFET, fin and channel the switch at 0.517 V (SPICE)
8 · The electrons measured 2.8 million electrons' worth of charge per flipped multiply-add input bit, 0.5 million per read-port bit (E60, board, at 0.522 V); 48 M per multiply-add the direction, stated right; the die's share (the minion rail)
9 · Atoms, the floor missing Landauer's 3.4 zJ; Gavin Crooks's five minutes phonons, the fin's self-heating, materials, the 25,000×
Coda · Back out partly the camera, live on aifoundry2's card, now shows where work runs on the die at constant total power: the warm half moves +525 ± 22 mK as 192 harts go west→east and +511 ± 7 mK north→south, heat walks the four corners clockwise (p = 0.0005), a 4×2 block slides column by column, and the same-mask and 180°-rotation nulls stay flat (E62, eight movies); the die reads about −88° turned, not mirrored; a +373 mK left/right swap when the loud half of the shires moves (E61, exploratory) raw frames of a rung against its zero (lock-in); millimetres — a rigid mount and a fiducial or a measured lens distance

Every page, by kind

This project's own pages - What one flipped bit costs on the ET-SoC-1 (Tue 20 Oct; public): E60, the Hamming ladder run on three cards; code and data. - The Hamming ladder, read and run (Tue 20 Oct; private): your summary of the ask, the reading, the runs and what's next. - The Hamming ladder, every page read (Tue 20 Oct; private): the research map, 50 agents over every linked page. - A bit flip in microns (Tue 20 Oct; spacesheep, anyone with the link): Dally's 10 µm against E60 and the heat-per-mm mesh; a gate 5 µm, a delivered operand bit 0.3 mm, a multiply-add input bit 1.8 mm, an add lane 0.6 mm. - Heat movies: where the work runs, seen from outside (Wed 21 Oct; public): E62, eight movies of heat on the die by how the compute is scheduled, with the camera's live stream beside them; code and pre-registration, data. - Verifying the deterministic transistor-flip experiments (Wed 21 Oct; public): E61, the 19:28 page's seven experiments pre-registered and run on three cards; code and data. - Deterministic transistor-flip experiments on 1,024 RISC-V cores (Tue 20 Oct; spacesheep, public): the "Antigravity: deterministic transistor flipping count" query — 7-rung complexity ladder, E46 fxor.pi vs fand.pi/for.pi decomposition (5.0 fJ input vs 33.7 fJ output bit flip), 7 deterministic RISC-V experiments (E-D1–E-D7), and 3 interactive explorers. Its E46 prices and "+8.94 pJ" do not hold up (research map §3); E60 measured the same quantities directly. - From the speed down to the atoms: the plan (Tue 20 Oct; spacesheep, private). - The follow-up, counted down to the electron (Fri 16 Oct; tailnet, private), with its numbers script. - Weighing a bit flip: the plan (Mon 12 Oct; spacesheep, private). - What to get out of mordast (Wed 14 Oct; tailnet, private, NDA): Eric Frank's and Mitchell Nahmias's asks. - Horace's missing bit-flip heat (Thu 22 Oct; private: NDA; tailnet, the original on mordast): the archive's answer to the plan's §5 list and the Levels tab's gaps, from its session on mordast.

The lab's measurements (all public, from the lab repo) - The Horace experiment: findings 10, 11 and 12. - Why the ET-SoC-1 is low power: finding 13. - The DVFS loop and its leakage: finding 16. - Limits of observability and the energy manual: finding 19. - Heat per millimetre: finding 20. - How energy is measured and heat spreading. - The chip diagram, the post's zoom, and its two audits: the review and the deep audit.

Data and code - The 21 Sep data (tailnet): horace3.json, model.json, toggles.json, vf.json, strict/tiles/ and cold1.txt. - The RTL toggle bench (rtl-sim/fma_toggle), which counts every net's toggles for the tiles the card actually ran.

Background you wrote - The Memory Wall and Justifying Dally's heuristics (Tue 8 Sep; the latter public with calculators): charge, capacitance and repeaters. - David Kanter on power (private). - Power, not heat: what limits a GPU under sustained matmul (Thu 22 Oct; spacesheep, public): A100 to GB300, AMD, Gaudi 3, TPUs and consumer cards, at the chip, the fleet and the facility. - A compiler that knows where the fan is (public): the prior art. - What a thermal model needs (public). - Sutro #36 (private).

The heat side - Thermal camera hub (spacesheep, public). - Calibrating the P3 and cooling from the back, camera on top (both public).

Neighbouring hubs - AI Foundry hub, AI Foundry projects, mordast Hub and Gyroscope Hub (all private). - Your own log, Project: AI Foundry. Its second goal, the thermal modelling of heat transistor by transistor, is this project.

Outside - Horace He, Strangely, Matrix Multiplications on GPUs Run Faster When Given "Predictable" Data! (Mon 29 Apr 2024). - Prior art: ALUPower (2016); Gregersen, Patel and Choukse (2024); Brier, Clavier and Olivier's correlation power analysis (CHES 2004). - The open 7 nm kit: ASAP7 in OpenROAD-flow-scripts. - The reading list for the bottom stops is in the plan's sources.

On mordast

The rule. This hub names files and paths in the Esperanto archive, never their contents. Roman's terms (Fri 9 Oct): - agents may run there and read; - TSMC kits and third-party IP never leave; - anything for people outside the company goes past Roman first.

So the vault's job here is to check the open-tool numbers in private. The public post uses the open route (the lab's RTL and ASAP7) unless Roman clears a number.

What the bottom stops need from it (the full list, with what's known so far, is the plan §5): 1. the vector lane's gate-level netlist; 2. its parasitics and delays; 3. clock-tree reports; 4. switching activity, including the archive's own .condense traces; 5. the power estimation flow and the switched-capacitance map; 6. the repeater spacing behind "about ten per mm"; 7. the Vmin table; 8. die thickness, the package stack and the board's regulators; 9. per-sensor offsets; 10. anything on FinFET or cell-library choices; 11. Mitchell's finds: a cycle estimator and a matmul co-design model.

Where to look: - The archive browser through the Intel's relay, http://intel:8792/: its power, kit, die map, formats and spelunking log pages. - The mordast Hub. - This project's own search, done Thu 22 Oct: Horace's missing bit-flip heat (on mordast, from the nekko.ai tailnet; spacesheep copy, private), from your Wed 21 Oct 11:49 ask in session 9388bba5 (mordast ~/claude, the mlc account; in the Claude app). Its agents' record and scratch stay on mordast, in ~/claude/vault-2026-10-11/agents/hb-*. - Earlier searches: thermal files (Sun 11 Oct), shire clocks and voltage (Sun 11 Oct, NDA), and Eric's and Mitchell's asks (Wed 14 Oct).

The search ran on your own ask rather than the plan's §5 prompt, and worked through 14 questions drawn from §5 and the Levels tab. What the archive could not settle, with a next step for each, is the report's Still missing section. For a follow-up search, the §5 prompt still works: it logs itself in the spelunking log, works read-only, and reports names, dates and what each file could confirm, never the contents.

Who helps where

Person Stops What they bring Status
Horace He 0 the original result, and its open line about counting flips whether he hears first is your call
Eric Frank (Vinci4D) 3, coda a per-shire heater; heat that stays local within a shire; 20 µs clock steps; a thermal-aware compiler his code and readings are asked for in the 12 Oct plan; at the lab Friday
Mitchell Nahmias (Sphere Semi) 0–1, 4–6 explained repeaters and inverters at Sutro #36; the file-type list; his mordast search's cycle estimator and matmul co-design model not under the NDA, so Roman reviews what reaches him
Gavin Crooks (Achira) 9 the thermodynamics of computing; his Sutro #36 five minutes on the floor ask him to read stop 9
Alexander Mordvintsev, Eyvind Niklasson (Google) format, 6–7 interactive Distill-style articles; Alex's layout-to-circuit simulator and transistor-level circuit evolution your intro to Alex was drafted Sat 17 Oct
SemiAnalysis (Howie, Jawi) 3, 6, 7 Howie offered on Fri 16 Oct to decap a working card near Portland; Jawi can decap one in about a month. Either gives a real die photo and cross-sections needs Roman's OK, an NDA and a card
Roman Shaposhnik all pinned clocks, the camera mount, a card to decap, anything near the vault Fri 23 Oct at Studio 45
David Kanter (MLCommons) 1 power, DVFS and leakage done (brief)

About this hub

  • What it is. One page for the Horace project, made on your ask of Tue 20 Oct 2026 (week 43), 14:4x: "This hub will be used to centralize all thinking around the Horus project." You dictated "Horus" and "Horace". It's Horace here, after Horace He and the lab's Horace experiment. Say the word if you meant Horus.
  • The goal, in your words: "start with the speed and then walk all the way down to the atoms", as an interactive post where "people should be able to go down and click".
  • How it's kept ("refresh the Horace hub"): 1. Add a Log entry at the end of this week's list. A new week gets its heading at the top. Every change to the hub adds one entry, in the same commit. 2. Update Status and Levels. 3. Render it: ~/git0/flush-util/md2report reports/horace-hub.md --eyebrow "Horace Hub". 4. Make the spacesheep copy: ~/git0/flush-util/sheep_copy reports/horace-hub.md --out ~/drive.unsynced/artifacts/horace-hub --eyebrow "Horace Hub". 5. Deploy it: stage_begin, a curl PUT, then deploy with the space's uuid and base_sha from dashboards/spacesheep-ledger.jsonl. 6. Check it reads private with get_space, add a ledger line, and commit the .md and .html with explicit paths.
  • Why the Log is grouped by week: your ask the same afternoon, for all your logs (gyroscope protocol.md § 9).
  • Private, on spacesheep and on the tailnet, because it names people and NDA-flagged pages. The AI Foundry rule is that private-door pages stay private (request-aifoundry.md).
  • Where it's linked from: the Gyroscope Hub (Start here and Projects).

Total life satisfaction: the thermal goal in your Project doc now has one place to live. This page shows what's done and what's next, so time you sit down to it goes to the next step rather than to finding the last one.